Design & Verification 183 views87 applications

Daily Job Update Full Time India

More Information

  • Workplace Type On-site (Employees come to work in-person)
  • Work Location India
  • Minimum Experience fresher

Job Requirements

1. As a Verification engineer Working on full chip Verification and UVM Methodology.
2. System Verilog and UVM is a must.
3. Worked on passing test cases, test benches, Building environment.
Good knowledge of Functional coverage, Code Coverage, Assertions, Constraints
3. Good communication skills.

 

M-Tech(21,22,23&24), B-Tech(2017,2018,2019,2020,2021&2022)

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Design verification System Verilog UVM Verilog
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