More Information
- Workplace Type On-site (Employees come to work in-person)
- Minimum Experience 5 Years
Responsibilities:
- FPGA Design Flow & Validation
- RTL Design, Implementation, and Protocols (PCIe, Ethernet, DDR4/5, Memory)
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Integration-focused role: 80% Integration, 20% Design
- System-level Testing & Design
- Silicon Validation
- Debugging Interfaces and Design-level Debugging
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Board-level Debugging
Requirements:
- Strong knowledge in RTL design and implementation
- Expertise in FPGA design flow and validation
- Experience with system-level testing and silicon validation
- Hands-on exposure to debugging (board level & design level)
- Familiarity with Xilinx / Intel toolchains
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Understanding of protocols: PCIe, Ethernet, DDR4/5, Memory
