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- Workplace Type On-site (Employees come to work in-person)
- Work Location India
- Minimum Experience 6 Years
Good understanding and knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
Experience IN developing DFT specifications and driving DFT architecture and methods
have experience in verilogwith simulators and waveform debugging tools
Understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon
Capability in debug ATPG patterns, compressed ATPG patterns, MBIST, and JTAG/1500 related issues
Experience in writing STA constraints and analysis for DFT modes and SDF simulations
Experience in silicon debug, gathering and analyzing data; and utilize scripting to support efficient handling of ATE data
MBIST and LBIST knowledge preferable
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